Custom Chip-to-Chip & Die-to-Die Links: When UCIe Isn’t the Answer
Die A
Framing (phit/flit format)
Forwarded clock / CDC
Credit-based flow control
CRC + retry (optional)
Init / training FSM
Lane repair (spare remap)
DFT: PRBS / loopback / counters
forwarded clock
data lanes
Die B
Framing (phit/flit format)
Forwarded clock / CDC
Credit-based flow control
CRC + retry (optional)
Init / training FSM
Lane repair (spare remap)
DFT: PRBS / loopback / counters
UCIe is the default die-to-die answer. But when both dies belong to one program, latency is nanosecond-critical, beachfront is tight, or packaging dictates terms — a custom Custom Chip-to-Chip & Die-to-Die can beat the standard. The price: you own the specification, verification, bring-up, and every reuse decision.
1. The decision, made honest
Choose UCIe when you need:
- ✓ Multi-vendor chiplets and interoperability
- ✓ Protocol mapping and ecosystem leverage
- ✓ Broad industry reuse and mindshare
- ✓ Long-term maintenance across partners
Choose a custom link when:
- ✓ Latency is nanosecond-critical
- ✓ Area / beachfront is constrained
- ✓ Power per bit (pJ/bit) is decisive
- ✓ Packaging reality drives the channel
- ✓ Traffic shape is known and singular
If three or four bite at once, the custom link is engineering.
2. Anatomy of a lean custom link
1
Framing — choose phit/flit format that fits the traffic, not a standard.
2
Clocking — forwarded-clock across the channel; CDC only where needed, understood as a bug-prone seam.
3
Flow control — credit-based is simple, scalable, and formally checkable.
4
Reliability — decide, don't default. Trust the channel, add CRC, or add retry.
5
Initialization & lane repair — train, detect, de-rate, and keep the link usable.
6
Observability & DFT — PRBS, loopback, counters, and status for visibility.
3. Reliability decision in one glance
Channel BER data
→
Error budget calculation
→
Residual error policy?
BER ≤ Target1
Trust the channel: no CRC, no retry — short advanced-package reach
Target1 < BER ≤ Target2
CRC only — detect & report: medium reach, software handles faults
BER > Target2
CRC + retry — detect & recover: longer organic substrate, replay buffer
The decision needs channel data, not assumptions. Write the justification down.
4. UCIe vs. Custom Custom Chip-to-Chip & Die-to-Die — trade-offs
| Axis | UCIe (Standard) | Custom Custom Chip-to-Chip & Die-to-Die (Lean Link) |
|---|---|---|
| Latency | Higher (protocol + layers) | Lower (fit-for-purpose) |
| Area / Beachfront | Larger (fixed features) | Smaller (only what you need) |
| Power (pJ/bit) | Higher (overheads) | Lower (minimal features) |
| Ecosystem / Reuse | Broad, multi-vendor | Program-specific |
| Spec Ownership | Consortium-owned | You own it |
| Verification Backstop | Standards + tooling | Your program + plan |
| Interop Risk | Low (if compliant) | N/A (single program) |
5. The verification program that replaces the backstop
1
Executable specification: Golden reference model of framing, credits, init, error behavior — the arbiter every testbench checks against
2
Formal where it pays: Credit accounting, CDC correctness, init-state reachability — small state, catastrophic failure modes
3
Asymmetric-endpoint simulation: Both dies' RTL across resets, init races, skew corners, retry storms, repair events
4
Fault campaigns: Inject on every lane: CRC events, credit corruption, init interruption, mid-traffic lane failure with repair
5
Silicon hooks proven pre-silicon: Simulate PRBS/loopback/counter paths — unverified bring-up tools are bring-up risks
6
The reuse dossier: Spec, model, testbench, coverage report, runbook, errata — versioned together. The difference between custom link and legacy liability
SNOVA perspective
We work both sides: UCIe compliance and interoperability for multi-vendor programs, and custom link specification, design, and verification for single-program performance. Make the call with channel data, latency budgets, and floorplan constraints on the table.
6. Conclusion
UCIe is the right default, and defaults exist to be overridden for reasons. When latency, area, power, packaging, and traffic all point the same way, a custom Custom Chip-to-Chip & Die-to-Die is smaller, faster, leaner — provided you accept that the spec and verification standard now have one owner: you.